DH算法类相关接口

struct wcrypto_dh_msg {
__u8 alg_type:3;/* Denoted by enum wcrypto_type */
__u8 op_type:2;/* Denoted by enum wcrypto_dh_op_type */
__u8 data_fmt:1; /* Data format, denoted by enum wd_buff_type */
__u8 is_g2:2;/* g2 mode of phase 1 */
__u8 result;/* Data format, denoted by WD error code */
__u16 key_bytes;/* Key size */
__u8 *x_p; /* This is Xa and p data in order. Should be DMA buffer */
__u8 *g; /* This is PV also at phase 2. Should be DMA buffer*/
__u8 *out; /* Result address, should be DMA buffer */
__u16 xbytes; /* parameter Xa size */
__u16 pbytes; /* parameter p size */
__u16 gbytes; /* parameter g size */
__u16 out_bytes; /* output parameter size */
__u64 usr_data; /* user identifier：struct wcrypto_cb_tag */
};

enum wcrypto_dh_op_type {
WCRYPTO_DH_INVALID, /* invalid DH operation */
WCRYPTO_DH_PHASE1,/* Phase1 DH key generate */
WCRYPTO_DH_PHASE2,/* Phase2 DH key compute */
};

struct wcrypto_dh_ctx_setup {
wcrypto_cb cb; /* call back function from user */
__u16 data_fmt; /* data format denoted by enum wd_buff_type */
__u16 key_bits;/* DH key bites */
bool is_g2; /* is g2 mode or not */
struct wd_mm_br br; /* memory operations from user */
};

struct wcrypto_dh_op_data {
void *x_p; /* x and p, should be DMA buffer */
void *pv;/* it is g, but it is PV at phase 2, should be DMA buffer */
void *pri;/* phase 1&&2 output, should be DMA buffer */
__u16 pri_bytes;/* output bytes */
__u16 pbytes; /* p bytes */
__u16 xbytes; /* x bytes */
__u16 pvbytes; /* pv bytes */
enum wcrypto_dh_op_type op_type; /* operational type */
__u32 status;/* output status  */
};