Special Scenario 2: SVA Is Not Supported. All Devices Registered with the UACCE Do Not Support the IOMMU Scenario

To transfer the address visible to the accelerator hardware to the hardware, the wd_blk_iova_map and wd_blk_iova_unmap interfaces are added to the WD basic layer to convert the user-mode address to the address visible to the hardware and convert the hardware-visible address to the user-mode address. For details about the APIs, see BLK Memory Management Interfaces. Note that the interfaces that support these scenarios are not the mainstream ones. In addition, these interfaces may be removed because the solution that does not support IOMMU has security problems.

In this scenario, when the WD basic layer interfaces are used, the process is the same as that described in Special Scenario 1: SVA Is Not Supported But IOMMU Is Enabled. All Devices Registered with the UACCE Support PASID and IOMMU. Only the user-mode driver layer interfaces of the hardware accelerator need to be adjusted. The adjustment is implemented by the development personnel of the user-mode driver during driver development. The user of the WD basic layer interface does not perform any operation. During the wd_send process, the memory allocated by using wd_alloc_blk needs to be converted into a hardware visible address by using wd_blk_iova_map. During the wd_recv process, the memory allocated by using wd_alloc_blk needs to be converted into a user-mode visible address by using wd_blk_iova_unmap.