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C11 Memory Model

Before GCC 4.7, the default memory model in the __sync primitive is the full barrier model. The read and write operations before and after the __sync primitive cannot be rearranged. To improve the pipeline execution efficiency, GCC 4.7 integrates with the C11 memory model. The __atomic synchronization primitive is used to control the required barrier level.

Memory Model

Description

__ATOMIC_RELAXED

Other read and write operations are not synchronized. Only the atomic operation is ensured.

__ATOMIC_CONSUME

Load operation. The fetch operation on which the current thread depends on the atomic variable cannot be reordered before the instruction, and is visible to the store operation (release) of another thread.

__ATOMIC_ACQUIRE

Load operation. All fetch operations on the current thread cannot be reordered before the instruction, and is visible to the store operation (release) of another thread.

__ATOMIC_RELEASE

Store operation. All fetch operations on the current thread cannot be reordered after the instruction, and is visible to the load operation (consume) of another thread.

__ATOMIC_ACQ_REL

Load/store operation: memory_order_acquire + memory_order_release.

__ATOMIC_SEQ_CST

memory_order_acq_rel + sequential consistency.