Instruction Set Overview

Huawei Kunpeng processors are based on the Arm architecture. Unlike Intel and AMD CPUs that use a complex instruction set computer (CISC), Arm CPUs use a reduced instruction set computer (RISC).

Due to the extensive instruction sets, and uncertain instruction lengths and execution periods in a conventional CISC system, implementation of instruction decoding and pipelines is very complex in hardware, bringing great difficulties to chip design and development as well as cost reduction.

The evolving computer technologies have been raising the demand for new and complex instruction sets, increasing the complexity of computer architectures. However, the use frequency of instructions in a CISC instruction set varies greatly. About 20% of the instructions are repeatedly used, accounting for 80% of code. The remaining 80% of instructions are rarely used, accounting for only 20% of code in program design. Obviously, this structure is not reasonable.

To address this problem, the University of California, Berkeley proposed the RISC concept in 1979. RISC does not simply reduce instructions. Instead, it streamlines the computer structure to improve the computing speed.

RISC preferentially selects simple instructions that are most frequently used to avoid complex instructions. It offers fixed instruction length, and fewer instruction formats and addressing modes. To achieve this, RISC adopts the control logic and limits the use of microcode control.

The Arm architecture features higher concurrency, better energy consumption ratio based on service features, and more choices, and adapts faster to the industry development.

Huawei Kunpeng processors are compatible with the Armv8 instruction set. For details, see Arm® Architecture Reference Manual Armv8, for Armv8-A Architecture Profile.

This document describes cases related to instruction replacement of Huawei Kunpeng 920 processors. It is intended for:

• Software development personnel
• Application porting personnel