Rate This Document
Findability
Accuracy
Completeness
Readability

VM Cache Topology Information Passthrough

By default, a VM cannot obtain the actual cache topology information of the host machine. This feature supports cache topology passthrough at the QEMU/libvirt level. It provides two modes—manual configuration and automatic derivation—to expose the actual cache topology of the host machine (including the capacity, number of sets, associativity, line size, and sharing level of each cache level) to the VM.

Manual configuration: QEMU adds a new -smp-cache command-line option, which allows users to specify attributes such as capacity and line size for each cache level (l1d/l1i/l2/l3), as well as the topology level to which it is bound. libvirt adds corresponding extended attributes to the domain XML and automatically generates the QEMU parameters during delivery. Based on the configuration, QEMU updates the CLIDR_EL1 register and constructs the ACPI Processor Properties Topology Table (PPTT) to expose the complete cache topology to the guest.

Automatic derivation (auto topology): To address the issue that manual configuration may not match the actual structure of the host machine, libvirt adds an auto_topology attribute to the domain XML. At VM startup, the vCPU pinning mapping is delivered to QEMU through the new QMP command set-vcpu-pinning. QEMU automatically reads the physical topology of the host machine and the per-level cache information from sysfs, derives a virtual topology consistent with the actual structure of the host machine, constructs the PPTT, and updates CLIDR_EL1 accordingly. Users do not need to manually set any cache parameters. When vCPU pinning is used, the virtual topology is fully aligned with the actual physical placement, and the guest scheduler's CCL scheduling domains match the real cache boundaries.

Constraints

  • Hardware environment: Only new Kunpeng 920 processor models and Kunpeng 950 processors are supported.
  • Software environment: The host OS is openEuler 24.03 LTS SP3 with a kernel baseline of OLK-6.6 (6.6.0-135.0.0). The QEMU version is 8.2.0, and the libvirt version is 9.10.0. In addition, the QEMU/libvirt patches for cacheinfo configuration (including the QMP command support for auto topology) must be applied separately.

Application Scenarios

This feature applies to all AArch64 KVM VM scenarios that require the guest to be aware of the actual cache hierarchy of the host, especially for workloads sensitive to cross-CCL communication and memory access locality (such as large-scale databases, distributed computing frameworks, and high-performance computing tasks). The L3 cache can be manually attached at the CCL level to keep the MC scheduling domain within a single CCL, reducing cross-CCL task scheduling and IPI communication and improving memory access locality. This feature can be used together with the SGI distribution path optimization in IPI Latency Optimization for High-Specification VMs to further reduce the end-to-end IPI latency within a VM. The two features are independent of each other and can be deployed and used separately.