make_tiled_copy

Create a tiled_copy policy. For transpose copy operations, the actual matrix size is determined by the product of the CopyAtom Ops transpose matrix size and the corresponding m and n dimensions from atom_shape. For prefetch operations, the actual matrix size is the product of the CopyAtom Ops prefetch matrix size and the corresponding m dimension in atom_shape.

Currently, m and n in atom_shape do not support extension. Restrictions vary across different CopyAtom Ops, as outlined in the following table.

Interface Definition

template<typename CopyAtom, typename Shape>

TiledCopy<CopyAtom, Shape> make_tiled_copy( CopyAtom copy_atom, Shape atom_shape);

Template Parameters

**Table 1** Template parameter definition
Parameter	Type	Description
CopyAtom	typename	Copy atom policy type.
Shape	typename	Shape type.

Parameters

**Table 2** Parameter definition
Parameter	Type	Description	Input/Output
copy_atom	CopyAtom, Ops<copy_atom_t>	Copy atom policy. Currently, copy_atom_t can be set to: KP36_32x1_F64_TRANS_RM2CM: copy atom operation with the transpose atom size of 32 × 1 and transpose precision of float64. The source matrix is row-major with a stride of Stride<shape_n, 1>, while the destination matrix is column-major with a stride of Stride<1, 32>. shape_n % 8 = 0 is required for this method. KP36_1x16_F64_TRANS_CM2RM: copy atom operation with the transpose atom size of 1 × 16 and transpose precision of float64. The source matrix is column-major with a stride of Stride<1, shape_m>, while the destination matrix is row-major with a stride of Stride<16, 1>. shape_m % 8 = 0 is required for this method. KP36_16x2_BF16_TRANS_RM2ZZ: copy atom operation with the transpose atom size of 16 × 2 and transpose precision of bfloat16. The source matrix is row-major with a stride of *Stride<2 shape_n, 1>, while the destination matrix utilizes a ZZ-peak layout with a stride of Stride<2, Stride<1, 32>>. shape_n % 16 = 0 is required for this method. KP36_2x64_BF16_TRANS_CM2NN: copy atom operation with the transpose atom size of 2 × 64 and transpose precision of bfloat16. The source matrix is column-major with a stride of Stride<1, 2 * shape_m>, while the destination matrix utilizes a NN-peak layout with a stride of Stride<Stride<1, 128>, 2>. shape_m % 16 = 0 is required for this method. KP36_16x1_BF16_TRANS_RM2CM: copy atom operation with the transpose atom size of 16 × 1 and transpose precision of bfloat16. The source matrix is row-major with a stride of Stride<shape_n, 1>, while the destination matrix is column-major with a stride of Stride<1, 16>. KP36_1x64_BF16_TRANS_CM2RM: copy atom operation with the transpose atom size of 1 × 64 and transpose precision of bfloat16. The source matrix is column-major with a stride of Stride<1, shape_m>, while the destination matrix is row-major with a stride of Stride<64, 1>. KP36_16x4_INT8_TRANS_RM2ZZ: copy atom operation with the transpose atom size of 16 × 4 and transpose precision of int8. The source matrix is row-major with a stride of Stride<4 * shape_n, 1>, while the destination matrix utilizes a ZZ-peak layout with a stride of Stride<4, Stride<1, 64>>. shape_n % 16 = 0 is required for this method. KP36_4x64_INT8_TRANS_CM2NN: copy atom operation with the transpose atom size of 4 × 64 and transpose precision of int8. The source matrix is column-major with a stride of Stride<1, 4 * shape_m>, while the destination matrix utilizes a NN-peak layout with a stride of Stride<Stride<1, 256>, 4>. shape_m % 16 = 0 is required for this method. KP36_32x4_INT8_TRANS_RM2ZZ: copy atom operation with the transpose atom size of 32 × 4 and transpose precision of int8. The source matrix is row-major with a stride of Stride<4 * shape_n, 1>, while the destination matrix utilizes a ZZ-peak layout with a stride of Stride<4, Stride<1, 128>>. shape_n % 16 = 0 is required for this method. KP36_4x32_INT8_TRANS_CM2NN: copy atom operation with the transpose atom size of 4 × 32 and transpose precision of int8. The source matrix is column-major with a stride of Stride<1, 4 * shape_m>, while the destination matrix utilizes a NN-peak layout with a stride of Stride<Stride<1, 128>, 4>. shape_m % 16 = 0 is required for this method. KP36_PREFETCH_L1: L1 cache prefetch operation for tensor objects. Each Kunpeng CPU prefetch operation processes 64 bytes of memory. Accordingly, for tensor objects, the effective shape size for KP36_PREFETCH_L1 is precision-dependent: double-precision data corresponds to Shape<8> and Stride<1>, whereas bfloat16 data corresponds to Shape<32> and Stride<1>. For this method, atom shape_m cannot be extended and is always 1. KP36_PREFETCH_L2: L2 cache prefetch operation for tensor objects. Each Kunpeng CPU prefetch operation processes 64 bytes of memory. Accordingly, for tensor objects, the effective shape size for KP36_PREFETCH_L2 is precision-dependent: double-precision data corresponds to Shape<8> and Stride<1>, whereas bfloat16 data corresponds to Shape<32> and Stride<1>. For this method, atom shape_m** cannot be extended and is always 1.	Input
atom_shape	Shape	Number of times that the atom policy is executed in each dimension. For the transpose atom operation, both m and n are included. For the prefetch atom operation, only m is included.	Input

Return Value

TiledCopy<StoreCopy, Shape> object returned.

Examples

#include <stdio.h>
#include <stdlib.h>
#include "kupl_mma.h"
using namespace kupl::tensor;

int main()
{
    constexpr int MATRIX_M = 32;
    constexpr int MATRIX_N = 512;
    double *dst = (double*)malloc(sizeof(double) * MATRIX_M * MATRIX_N);
    double *src = (double*)malloc(sizeof(double) * MATRIX_M * MATRIX_N);
    for (int i = 0; i < MATRIX_M; i++) {
        for (int j = 0; j < MATRIX_N; j++) {
            dst[i * MATRIX_N + j] = 0.0;
            src[i * MATRIX_N + j] = i * MATRIX_N + j;
        }
    }

    auto shape_d = make_shape(Int<MATRIX_M>{}, Int<MATRIX_N>{});
    auto shape_s = make_shape(Int<MATRIX_M>{}, Int<MATRIX_N>{});

    auto stride_d = make_stride(Int<1>{}, Int<MATRIX_M>{});
    auto stride_s = make_stride(Int<MATRIX_N>{}, Int<1>{});

    auto layout_d = make_layout(shape_d, stride_d);
    auto layout_s = make_layout(shape_s, stride_s);

    auto atom_copy_shape = make_shape(Int<1>{}, Int<MATRIX_N>{});
    auto tiled_copy = make_tiled_copy(Ops<KP36_32x1_F64_TRANS_RM2CM>{}, atom_copy_shape);

    auto tensor_d = make_tensor(dst, layout_d);
    auto tensor_s = make_tensor(src, layout_s);
    tensor_tiled_copy(tiled_copy, tensor_d, tensor_s);

    free(src);
    free(dst);
    return 0;
}

The preceding example illustrates the row-major to column-major copy process for a 32 × 512_F64 matrix. The copy tiling policy is initialized via make_tiled_copy, utilizing the COPY_32x1_F64_RM2CM atom method with an atom_shape of shape<1, 512>.

Parent topic: Matrix Programming API Functions