OVS Open Programming

Application Scenarios

OVS open programming allows developers to extend OVS services based on Huawei DPUs. They can implement custom packet parsing, flow tables, flow table keys/actions, and pipelines based on the match-action mechanism of OVS (a core processing paradigm widely applied in network data plane programming).

Implementation Principles

OVS open programmability relies on OVS' match-action service logic to support pipeline construction for packet forwarding and processing.

It enables developers to customize packet parsing and flow tables (including key/action logic) based on match-action logic. In addition, the jump logic is provided to enable developers to organize multiple match-action units into a pipeline, which expresses more complex packet processing and forwarding logic. Theoretically, the pipeline can implement any operation within the packet forwarding and processing scope, and is scalable.

Figure 1 Compilation process

The DSL employs a source-to-source approach to translate DSL code into C microcode. This is then processed by a microcode compiler to complete the conversion from C code to FlexDA firmware binary. Finally, user-defined microcode is inserted into the data plane execution logic via the microcode open APIs.

During the DSL translation process, a hydrainfo file is generated, which is similar to the p4info.txt file in P4 (a DSL for network devices). This file serves as the flow table information interface exposed by the DSL-based data plane program to the control plane. It is primarily used during flow entry issuance to define the tuple information for flow table keys, the list of available actions, and their associated action data.

If the user control plane software is open-source or custom OVS, the programming framework provides simple OVS control plane programming capabilities. You can introduce the hydrainfo file to implement control plane hook functions (interface functions that are preset in the software framework and allow users to insert custom code in a specific processing phase), and generate a dynamic link library to customize the flow entry issuing logic that matches the self-defined microcode on the data plane. For details, see Brief Control Plane Development.