Special Scenario 2: SVA Is Not Supported. All Devices Registered with the UACCE Do Not Support the IOMMU Scenario

In this scenario, the interface information is the same as that in Special Scenario 2: SVA Is Not Supported. All Devices Registered with the UACCE Do Not Support the IOMMU Scenario.

No interface is added to the algorithm layer.

When the memory space needs to be shared with the hardware, the user-mode program reserves and uses the memory by using the wd_reserve_memory, wd_blkpool_create, wd_blkpool_destroy, wd_alloc_blk, wd_free_blk, wd_blk_iova_map, and wd_blk_iova_unmap interfaces.

When the WD basic layer interfaces are invoked through the algorithm layer, the process is the same as that of Special Scenario 2: SVA Is Not Supported. All Devices Registered with the UACCE Do Not Support the IOMMU Scenario. Only the user-mode driver layer interfaces of the hardware accelerator need to be adjusted. The adjustment is implemented by the development personnel of the user-mode driver during driver development. The user of the WD algorithm layer interface does not perform any operation. In the wd_send process, the user-mode driver layer of the hardware accelerator converts the user-mode address into a hardware visible address by using wd_blk_iova_map. In the wd_recv process, the user-mode driver layer of the hardware accelerator converts the hardware visible address into a user-mode visible address by using wd_blk_iova_unmap. The address conversion is performed by the user-mode driver layer of the hardware accelerator.