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Special Scenario 1: SVA Is Not Supported But IOMMU Is Enabled. All Devices Registered with the UACCE Support PASID and IOMMU

In this scenario, the interface information is the same as that in Special Scenario 1: SVA Is Not Supported But IOMMU Is Enabled. All Devices Registered with the UACCE Support PASID and IOMMU.

No interface is added to the algorithm layer.

The memory operations need to be adjusted in the following cases:

  1. If the pointer needs to be transferred to the hardware before the algorithm is invoked, declare a struct wd_blkpool_setup variable before step 4 in Default Scenario to determine the size of the memory pool, the number of blocks in the memory pool, and the size of each memory block.
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    struct wd_blkpool_setup {
__u32 block_size;/* Block buffer size */
__u32 block_num;/* Block buffer number */
__u32 align_size;/* Block buffer startging address align size */
struct wd_mm_br br;/* memory from user if don't use WD memory */
};
  2. If the pointer needs to be transferred to the hardware before the algorithm is invoked, use the address of the struct wd_blkpool_setup variable as the parameter to invoke the void *wd_blkpool_create(struct wd_queue *q, struct wd_blkpool_setup *setup) interface to reserve the memory of the corresponding size. If the memory is reserved successfully, the start address of the memory pool is returned. If the memory fails to be reserved, a null pointer is returned. The function internally invokes wd_reserve_memory to reserve memory.
  3. If the pointer needs to be transferred to the hardware before the algorithm is invoked, the address to be transferred to the hardware is allocated from the reserved memory pool by using wd_alloc_blk in step 4 in Default Scenario.
  4. After the data is processed, use wd_free_blk to release the memory in step 6 in Default Scenario.
  5. Before the queue is released, use the start address of the reserved memory pool as the parameter, and invoke wd_blkpool_destroy to release the reserved memory after step 7 in Default Scenario.