Memory Barrier

To prevent CPU instruction rearrangement, memory barriers need to be explicitly added in concurrent programming.

• Memory barrier for x86 platform

  define pg_memory_barrier_impl()                \
          __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory", "cc")

• AArch64 platform

  define pg_memory_barrier_impl()   __atomic_thread_fence(__ATOMIC_SEQ_CST)
  define pg_memory_barrier_impl()   __sync_synchronize()