Milvus Vector Instruction and Prefetch Optimization
Application scenario: Vector instructions and prefetch operations are applicable to frequent cyclic operations and high cache miss rate.
Technical principle: Scalability and vector predicate operations of SVE improve the code portability and efficiency. In addition, prefetch loads data to the cache in advance for large amounts of parallel computing, which can significantly reduce the memory access latency and improve the overall system performance.
Performance metric: The Milvus-HNSW algorithm improves QPS performance by 20% on the ANN-Benchmarks GIST dataset with a recall value greater than 0.99 and the configuration of 16 vCPUs and 64 GB memory. The Milvus-ScaNN algorithm also improves QPS performance by 20% on the ANN-Benchmarks GIST dataset with a recall value greater than 0.95.
