Tiancheng Code Optimizer Functions

The Tiancheng Code Optimizer is a static code analysis tool built on Clang/LLVM, focusing on vectorized optimization of C/C++ code. The tool automatically identifies vectorizable loop patterns and supports x86 Intel intrinsics analysis to detect x86 vectorized instructions. It automatically generates Arm vectorized code for automatic rewriting. These capabilities help developers quickly convert scalar code into efficient Arm vectorized code and fully leverage the performance benefits of NEON/SVE instruction sets.

The tool supports the following modes:

Flame graph scanning mode (recommended): You can analyze and optimize the top hotspot functions in a flame graph to quickly identify functions or code with potential for optimization.
Function scanning mode: You can analyze and optimize specified functions to quickly identify functions that can be vectorized.
Single-file scanning mode: You can analyze and optimize a single source file to identify code snippets that can be vectorized.

By default, scalar code is scanned in the preceding modes. When x86 Intel intrinsics analysis is enabled, x86 vectorized instructions can be scanned.

Prerequisites

The Tiancheng Code Optimizer has been installed.
The tool is contained in an independent package (tiancheng-x.x.x-Linux-Kunpeng.tar.gz). Extract the package and switch to the tool directory.

Command Function

Automatically identifies vectorizable loop patterns and supports x86 Intel intrinsics analysis to detect x86 vectorized instructions, and also automatically generates Arm vectorized code for automatic rewriting.

Syntax

./tiancheng [options]

**Table 1** Parameter description
Parameter	Option	Description
-h/--help	-	(Optional) Obtains help information.
-i	-	(Optional) Input C/C++ source file. It is required when using single-file scanning mode. NOTE: If both -i and -r are specified, -i takes priority over -r, and the file specified by -i is used as the input file.
-I	-	(Optional) Header file directory.
-o	-	(Mandatory) Output directory for report files.
-r	-	(Mandatory) Project root directory of the source file to be analyzed. This directory is used for header file searches to prevent missing headers.
-v	-	(Optional) Enables the detailed output mode to display additional debugging information and the analysis process. By default, this function is disabled.
--simd-target	neon/sve	(Optional) Arm instruction set to convert to. The value is NEON or SVE and defaults to neon. NEON: SIMD instruction set in the Arm architecture. It uses 128-bit vector registers for parallel data processing and supports 8-, 16-, 32-, and 64-bit integer operations, as well as single-precision floating-point operations. It is supported on servers based on the Kunpeng 920 series and Kunpeng 950 processors. SVE: It is a vector-length-agnostic SIMD instruction set that allows the same code to automatically achieve optimal performance on Arm processors with different vector widths. It is supported on some of servers based on the new Kunpeng 920 models and Kunpeng 950 processors. NOTE: When x86 Intel intrinsics analysis is enabled, the --simd-target parameter must be set to sve.
--enable-ifstmt-scan	-	(Optional) Enables the scanning and analysis of if statements.
--enable-intel-intrinsics	-	(Optional) Enables x86 Intel intrinsics analysis to analyze x86 vectorized instructions and rewrite x86 vectorized code. By default, this function is disabled.
--isa	sse2/avx/avx2/avx512	(Optional) x86 instruction set to be identified. The default value is avx2. This parameter is only effective when x86 Intel intrinsics analysis is enabled. SSE2: SIMD instruction set in the x86 architecture. It uses 128-bit vector registers for parallel data processing and supports 8-, 16-, 32-, and 64-bit integer operations, as well as double-precision floating-point operations. AVX: SIMD instruction set in the x86 architecture. It enables parallel data processing using 256-bit vector registers, supporting 256-bit single-precision and double-precision floating-point operations. AVX2: SIMD instruction set in the x86 architecture. It enables parallel data processing using 256-bit vector registers, supporting 256-bit integer and floating-point operations. AVX512: SIMD instruction set in the x86 architecture. It enables parallel data processing using 512-bit vector registers, supporting 512-bit integer operations and floating-point operations. NOTE: If the identified instruction set is AVX-512, the optimized source code must run on a device that supports SVE with a 512-bit vector length.
--features	fma/dq/bw/vl/bf16/vnni/fp16	(Optional) x86 instruction set features. The default value is empty. Multiple options are supported, separated by commas (,). This parameter is only effective when x86 Intel intrinsics analysis is enabled. FMA: Fused multiply-add operation, which performs multiplication and addition in a single instruction. It does not depend on the AVX512 instruction set and can be used in combination with AVX, AVX2, and AVX512 instruction sets. DQ: Double-precision floating-point, an AVX512 instruction set feature that supports 32-bit and 64-bit integer and floating-point operations. BW: Byte and word extension, an AVX512 instruction set feature that supports 8-bit and 16-bit integer operations. VL: Vector length extension, an AVX512 instruction set feature that allows AVX512 instructions to operate on 128-bit and 256-bit vector registers. BF16: 16-bit brain floating point format, an AVX512 instruction set feature that supports 16-bit brain floating point operations. VNNI: Vector neural network instructions, an AVX512 instruction set feature that supports low-precision integer vector dot product and multiply-accumulate operations. FP16: Half-precision floating point, an AVX512 instruction set feature that supports vector arithmetic operations on half-precision floating-point numbers.
--top	-	(Optional) Top N hotspot functions. The default value is top 10. It is required when using flame graph scanning mode.
--flamegraph	-	(Optional) Path to flame graph SVG files in flame graph scanning mode. It is required when using flame graph scanning mode.
--funcs	-	(Optional) List of functions to be analyzed in function scanning mode. It is required when using function scanning mode.
--gcc-toolchain	-	(Optional) GCC Compiler installation directory, which is used as the toolchain path for code analysis. By default, the GCC Compiler directory of the system is used.
--clang-resource-dir	-	(Optional) Directory containing the Clang built-in header file (for example, stddef.h). By default, the header file directory in the lib directory of the tool is used. NOTE: The default value of this parameter is install_path/tiancheng/lib/clang/17.
--version	-	(Optional) Displays the tool version.

Example

Run the following command to view the functions supported by the Tiancheng Code Optimizer:

./tiancheng -h

Command output:

OVERVIEW: ARM Intrinsics Analyzer
USAGE: tiancheng [options]

OPTIONS:
  -h/--help                  Display available options
  -i <filename>              Specify input C/C++ source file
  -o <pathname>              Specify output report file path
  -r <pathname>              Inputfile root path
  -I <pathname>              Add directory to include search path
  -v                         Enable verbose output
  --simd-target=<value>      Convert simd type selection
    =neon                      Convert to ARM NEON intrinsics
    =sve                       Convert to ARM SVE intrinsics
  --enable-ifstmt-scan       Enable scanning of if statements
  --enable-intel-intrinsics  Enable analysis of x86 Intel intrinsics
  --isa=<level>              x86 ISA level for Intel intrinsics analysis
                             Only effective with --enable-intel-intrinsics
    =sse2                      SSE2:    128-bit SIMD, baseline x86-64
    =avx                       AVX:     256-bit SIMD, float only
    =avx2                      AVX2:    AVX + 256-bit integer ops (default)
    =avx512                    AVX-512: AVX2 + 512-bit SIMD foundation
  --features=<f1,f2,...>     x86 feature flags, comma-separated
                             Layered on top of --isa. Only effective with --enable-intel-intrinsics
    fma    Fused Multiply-Add: enables _mm256_fmadd_ps etc.  -> -mfma
           (works with avx/avx2/avx512, not AVX-512-specific)
    dq     Doubleword/Quadword: enables 64-bit mask ops,     -> -mavx512dq
           _mm512_reduce_add_ps, _mm512_mullo_epi64 etc.
    bw     Byte/Word: enables byte/word mask and compare ops -> -mavx512bw
    vl     Vector Length: enables 128/256-bit AVX-512 ops   -> -mavx512vl
    bf16   BFloat16: enables _mm512_dpbf16_ps etc.           -> -mavx512bf16
           (auto-implies dq, bw, vl)
    vnni   Vector Neural Net Instructions: int8 dot-product  -> -mavx512vnni
    fp16   FP16 arithmetic: enables _mm512_add_ph etc.       -> -mavx512fp16
  --top                      Analyze top n hotspot functions
  --flamegraph               Path to the flamegraph SVG file
  --funcs                    Comma-separated list of functions to analyze
  --gcc-toolchain            Path to the GCC toolchain root directory used by Clang
  --clang-resource-dir       Clang resource directory (path up to lib/clang/<version>, excluding 'include')
  --version                  Display the version of this program

EXAMPLES:
  Note: [option] denotes an optional argument.

  Mode 1 - Single file scan
    tiancheng -i input.cpp -o ./output [-r /path/to/project]

  Mode 2 - Target functions scan (single file)
    tiancheng -i input.cpp -o ./output --funcs func1,func2

  Mode 3 - Target functions scan (whole project)
    tiancheng -o ./output -r /path/to/project --funcs func1,func2

  Mode 4 - Flame graph hotspot scan
    tiancheng -o ./output -r /path/to/project --flamegraph hotspot.svg [--top 10]

  Mode 5 - x86 Intel intrinsics migration
    # Basic usage
    tiancheng -i vec.cpp -o ./output --enable-intel-intrinsics
    # Specify ISA level
    tiancheng -i vec.cpp -o ./output --enable-intel-intrinsics [--isa=avx2]
    # Specify ISA level and extra features
    tiancheng -i vec.cpp -o ./output --enable-intel-intrinsics [--isa=avx512] [--features=dq,bw]

Parent topic: Tiancheng Code Optimizer (CLI)